Document :

ITU-T�SG 15� (Study Period 2013)� Contribution� 2137

Title :

Rate Compensation block Alignment in 400 GBASE-R

Date :

2016-09-06

Source :

Xilinx Incorporation

AI/Question :

Q11/15

Meeting :

2016-09-19

Access :

Restricted to TIES users�[ITU-T]