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• CCITT Rec. Q.400 Sup.1 (11/1988) – LINE SIGNALLING FOR DC LINES WITH SYSTEM R2 INTERREGISTER SIGNALLING
  • 1 Introduction
  • 2 Principles of the signalling and speech circuit
    • 2.1 Signalling circuit
    • 2.2 Speech circuit
  • 3 Meaning of the signalling states
  • 4 Discrimination between the various signalling states
  • 5 Operation (see Figures 2a-2f)
  • 6 Time requirements
    • 6.1 Recognition times
    • 6.2 Release times
    • 6.3 Sending times
  • 7 Miscellaneous