CONTENTS
1
Scope
2 References
2.1
Normative references
2.2
Informative references
2.3
Reference acquisition
3 Terms and definitions
4 Abbreviations, acronyms and conventions
4.1
Abbreviations and acronyms
4.2
Conventions
5 Technical
overview
5.1 System
architecture
5.2 Bonding
services model
5.3 Multiple services model
6 DEPI
architecture
6.1 DEPI
Data Path
6.2
Networking
considerations
6.3 System
timing considerations
7 DEPI control
plane
7.1
Topology
7.2
Addressing
7.3 Control
message format
7.4
Signalling
7.5 AVP
definitions
8 DEPI forwarding plane
8.1 L2TPv3
transport packet format
8.2 DOCSIS MPT mode
8.3 PSP mode
8.4 DEPI latency measurement (DLM) sublayer
header
8.5 M-CMTS
core output
rate
Annex A � DEPI MTU
A.1 L2TPv3
lower layer payload size
A.2 Maximum frame
size for DEPI
A.3 Path MTU
discovery
Annex B � Parameters and constants
Appendix I � DEPI and DOCSIS system performance
I.1
Introduction
I.2
Round-trip time and performance
I.3
Elements of round-trip time
I.4
CIN characteristics
I.5
Queueing delays in network elements
I.6
Traffic prioritization and network
delays
I.7
Queue persistence in a DEPI
flow
I.8
PSP mode
Appendix II � Early adoption and evolving use of EQAM devices
II.1
EQAM development: Category A (no
DTI)
II.2 EQAM
development: Category B (with DTI)
II.3 Possible
M-CMTS feature
phasing
II.4 Optional UDP
layer