�1���� General
������� 1.1���� Scope
������� 1.2���� Configuration
������� 1.3���� Application
������� 1.4���� Abbreviations
�2����
Modelling and relationship between the digital section and the ET
�3����
Functions
������� 3.1���� B-channel
��� ����3.2���� H0-channel
������� 3.3���� H1-channel
������� 3.4���� D-channel
������� 3.5���� Bit timing
������� 3.6���� Octet timing
������� 3.7���� Frame alignment
������� 3.8���� CRC procedure
������� 3.9���� M-channel
������ 3.10���� Power feeding
����� �3.11���� Operation and
maintenance
�4����
Network performance
������� 4.1���� Availability
������� 4.2���� Signal transfer delay
������� 4.3���� Error performance
������� 4.4���� Jitter
�5����
Operation and maintenance
������� 5.1���� General
������� 5.2 ����Control facilities
������� 5.3���� Monitoring
�6����
Operation and maintenance procedures
������� 6.1���� Partitioning of functions
������� 6.2���� Definitions of signals at the T reference point
������� 6.3���� Definition of DS state machine
������� 6.4���� Definition of ET layer 1 state machine
Annex A� �� System management requirements
������� A.1���� Introduction
������� A.2���� System management requirements
Annex B� �� Allocation of signal codings and DS state transition tables for
option 2 according to Recommen-dation I.604 at 2 Mbit/s
������� B.1���� Introduction
������� B.2���� DS state transition table
������� B.3���� Coding of signals at V3 reference point
������� B.4���� Allocation of signal elements to functional elements
������� B.5���� Indication of CRC-4 errors detected at the T reference point
to the ET
Annex C� �� Allocation of signal codings and DS state transition tables for
option 3 according to Recommen-dation I.604 at 2 Mbit/s
������� C.1���� Introduction
������� C.2���� Signals at the V3 reference point
������� C.3���� Definition of function elements (FEs) at the V3 reference
point
������� C.4���� FEs at the V3 reference point
������� C.5���� Performance criteria
������� C.6���� Access digital section (DS) state machine