ITU-T Rec. G.704 (1991) � SYNCHRONOUS FRAME STRUCTURES USED AT PRIMARY AND SECONDARY HIERARCHICAL LEVELS
FOREWORD
1 General
2 Basic frame structures
    2.1 Basic frame structure at 1544 kbit/s
        2.1.1 Frame length:
        2.1.2 F-bit
        2.1.3 Allocation of F-bit
    2.2 Basic frame structure at 6312 kbit/s
        2.2.1 Frame length
        2.2.2 F-bits
        2.2.3 Allocation of F-bits
    2.3 Basic frame structure at 2048 kbit/s
        2.3.1 Frame length
        2.3.2 Allocation of bits number 1 to 8 of the frame
        2.3.3 Description of the CRC-4 procedure in bit 1 of the frame
    2.4 Basic frame structure at 8448 kbit/s
        2.4.1 Frame length
        2.4.2 Frame alignment signal
        2.4.3 Service digits
3 Characteristics of frame structure carrying channels at various bit rates in 1544 kbit/s
    3.1 Interface at 1544 kbit/s carrying 64 kbit/s channels
        3.1.1 Frame structure
        3.1.2 Use of 64 kbit/s channel time slots
        3.1.3 Signalling
    3.2 Interface at 1544 kbit/s carrying 32 kbit/s channel time slots (see Note)
        3.2.1 Frame structure
        3.2.2 Use of 32 kbit/s channel time slot
        3.2.3 384 kbit/s 12-channel time slot grouping
        3.2.4 32 kbit/s signalling grouping channel multiframe structure
        3.2.5 Signal grouping channel unused bits
        3.2.6 Loss and recovery of signalling channel multiframe alignment
    3.3 Interface at 1544 kbit/s carrying n � 64 kbit/s
4 Characteristics of frame structures carrying channels at various bit rates in 6312 kbit/s interfaces
    4.1 Interface at 6312 kbit/s carrying 64 kbit/s channels
        4.1.1 Frame structure
        4.1.2 Use of 64 kbit/s channel time slots
        4.1.3 Signalling
    4.2 Interfaces at 6312 kbit/s carrying other channels than 64 kbit/s
5 Characteristics of frame structures carrying channels at various bit rates in 2048 kbit/s interfaces
    5.1 Interface at 2048 kbit/s carrying 64 kbit/s channels
        5.1.1 Frame structure
        5.1.2 Use of other 64 kbit/s channel time slots
        5.1.3 Signalling
    5.2 Interface at 2048 kbit/s carrying n � 64 kbit/s
        5.2.1 One n � 64 kbit/s signal on the tributary side of a multiplex equipment
        5.2.2 One or more n � 64 kbit/s signal on the multiplexed signal side of a multiplexing equipment
6 Characteristics of frame structures carrying channels at various bit rates in 8448 kbit/s interface
    6.1 Interface at 8448 kbit/s carrying 64 kbit/s channels
        6.1.1 Frame structure
        6.1.2 Use of 64 kbit/s channel time slots
        6.1.3 Description of the CRC procedure in 64 kbit/s channel time slot 99
        6.1.4 Signalling
    6.2 Interface at 8448 kbit/s carrying other channels than 64 kbit/s
ANNEX A � Examples of CRC implementations using shift registers
A.1 CRC-6 procedure for interface at 1544 kbit/s (see � 2.1.3.1.2)
A.2 CRC-5 procedure for interface at 6312 kbit/s (see � 2.2.3.2)
A.3 CRC-4 procedure for interface at 2048kbit/s (see � 2.3.3.5)
ANNEX B � Alphabetical list of abbreviations used in this Recommendation