CONTENTS

�1���� Scope
�2���� References
�3���� Abbreviations
�4���� Interface at 64 kbit/s
������� 4.1���� Functional requirements
����������������� 4.1.1���� Three types of envisaged interfaces
������� 4.2���� Electrical characteristics
��������������� ��4.2.1���� Electrical characteristics of 64 kbit/s codirectional interface
����������������� 4.2.2���� Electrical characteristics of the 64 kbit/s centralized clock interface
����������������� 4.2.3���� Electrical characteristics of 64 kbit/s contradirectional interface
�5���� Interface at 1544 kbit/s
������� 5.1���� General characteristics
������� 5.2���� Pulse specification
������� 5.3���� Eye diagrams
�6���� Interface at 6312 kbit/s
�7���� Interface at 32 064 kbit/s
�8���� Interface at 44 736 kbit/s
�9 ����Interface at 2048 kbit/s
������� 9.1���� General characteristics
������� 9.2���� Specifications at the output ports
������� 9.3���� Specifications at the input ports
������� 9.4���� Grounding of outer conductor or screen
10���� Interface at 8448 kbit/s
������ 10.1���� General characteristics
������ 10.2���� Specification at the output ports
������ 10.3���� Specifications at the input ports
������ 10.4���� Grounding of outer conductor
11���� Interface at 34 368 kbit/s
������ 11.1���� General characteristics
������ 11.2���� Specification at the output ports
������ 11.3���� Specifications at the input ports
������ 11.4���� Grounding of outer conductor
12���� Interface at 139 264 kbit/s
������ 12.1���� General characteristics
������ 12.2���� Specifications at the output ports
������ 12.3���� Specifications at the input ports
������ 12.4���� Grounding of outer conductor
13���� 2048 kHz synchronization interface
������ 13.1���� General
������ 13.2���� Specifications at the output port
������ 13.3���� Specifications at the input ports
������ 13.4���� Grounding of outer conductor or screen
14���� Interface at 97 728 kbit/s
15���� Interface at 155 520 kbit/s
������ 15.1���� General characteristics
������ 15.2���� Specifications at the output ports
������ 15.3���� Specifications at the input ports
������ 15.4���� Specifications at the cross-connect points
������ 15.5���� Grounding of outer conductor
Annex A � Definition of codes
������� A.1���� Definition of B3ZS (also designated HDB2) and HDB3
������� A.2���� Definition of B6ZS and B8ZS
������� A.3���� Definition of CMI
Appendix I � 1544 kbit/s specification in the 1991 version of this Recommendation
������� I.1���� General
������� I.2���� Interface specification
������� I.3���� Pulse mask
Appendix II � 64 and 6312 kHz synchronization interface specification for use in Japan
������ II.1���� 64 kHz synchronization interface
������ II.2���� 6312 kHz synchronization interface